Design and Design Automation of Flexible Hybrid Electronics
Flexible electronics (FE) is emerging as an alternative to conventional silicon electronics for applications such as wearable sensors, medical patches, bendable displays, foldable solar cells, disposable RFID tags and so on. Unlike conventional silicon electronics that needs billion-dollar foundry to manufacture, flexile electronic circuits can be fabricated on thin and conformable substrates such as plastic films, with low-cost high-throughput manufacturing methods such as multi-head ink-jet printing and roll-to-roll imprinting. Combining FE with thinned silicon chips, known as flexible hybrid electronics (FHE), can take advantages of both low-cost printed electronics and high performance silicon chips and enable various new applications, such as the next generation of wearable devices and IoT nodes.
Hardware is the root of trust in electronic systems. Hardware can both be exploited to mount powerful attacks on a
system (ex. Rowhammer) and designed to provide extra security not possible with only software defenses (ex. Data
Execution Prevention). Because hardware design mandates thousands of engineers and an entire ecosystem of design tools
and fabrication services, many people have access to the design and the opportunity to insert malicious functionality
known as Hardware Trojans. This project develops HDL-level analysis methods to verify the absence of Trojans and
accidental security holes in unspecified functionality by:
1). Characterizing unspecified functionality; 2). Verifying unspecified functionality is Trojan-free.
Variation-Aware Photonic System Modeling and Design
Optical interconnects provide high bandwidth, low power and low latency compared to traditional electrical interconnects, and is a promising substitute for the latter in short reach applications, such as data centers, inter-chip, and intra-chip communications. However, optical interconnects are very sensitive to temperature fluctuations and process variations. In photonic integrated circuits (PIC), process variation issues become more severe, and need to be addressed with great priority. This project explores variation-aware modeling, design and optimization techniques for photonic integrated systems.